Reliability Driven Resource Management of Multi-Core Real-Time Embedded Systems

On-line wear measurements of embedded microprocessor boards, using DVFS control based fault generation to determine critical timing path.
Software-only measurement of wear state demonstrates decreasing critical path slack over time.
Dynamic voltage and frequency scaling based critical timing path slack measurement is used to monitor wear over time.
Variable soft error rate as a function of active layer position near a solder bump with traces of polonium.
Overview of HyFRO, a framework improving reliability for MPSoCs with heterogeneous CPU core and integrated GPU.
Power consumption of “big" core and “little” core on TX2 under different utilization and frequency levels.

National Science Foundation small project CNS-1319718/1319784/1319904 focused on developing algorithms and analysis techniques to improve reliability in real-time systems subject to both permanent faults resulting from temperature-dependent wear processes and transient faults resulting from strikes by high-energy subatomic particles. This project developed techniques to measure the wear progression in microprocessors using only software; algorithms to improve the reliability of embedded systems containing heterogeneous compute cores and graphics processing units; and analysis techniques for estimating fault probabilities in integrated circuits subject to a variety of lifetime wear processes and transient faults, including spatially heterogeneous faults resulting from within-package high-energy particle emission.